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RT9361A/b 1 ds9361a/b-13 april 2011 www.richtek.com pin configurations ordering information general description the RT9361A/b is a high performance charge pump dc/dc converter that produces a regulated 4.5v and 5v output. no external inductor is required for operation. the operating voltage range is 2.8v to v out . internal soft-start circuitry effectively reduces the in-rush current both while start-up and mode change. the r t9361a/b features very low quiescent current, over current protection and short circuit protection. the RT9361A/b is available in wdfn-6l 2x2, so t-2 3-6 and tsot-23-6 package. marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area. tiny package, high performance, regulated charge pump features z z z z z input voltage range : 2.8v to v out z z z z z internal soft start function z z z z z 5v/4.5v fixed output voltage z z z z z over current protection function z z z z z short circuit protection function z z z z z rohs compliant and 100% lead (pb)-free applications z mobile phone, smart phone led backlight z camera flash white led z lcd display supply (top view) sot-23-6/tsot-23-6 note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. cp vin vout gnd en cn 5 4 1 2 3 6 7 wdfn-6l 2x2 vout gnd en cp vin cn 4 23 5 6 RT9361A/b package type e : sot-23-6 j6 : tsot-23-6 qw : wdfn-6l 2x2 (w-type) output voltage a : 5v b : 4.5v lead plating system p : pb free g : green (halogen free and pb free)
RT9361A/b 2 ds9361a/b-13 april 2011 www.richtek.com function block diagram part no. application configuration c in ( f) c pump ( f) c out ( f) RT9361A i out < 6 0m a @ v in > 3.2v, 1 or 2.2 0.22 1 or 2.2 i out < 110ma @ v in > 3.2v, 10 1 10 rt9361b i out < 8 0m a @ v in > 3.2v, 1 or 2.2 0.22 1 or 2.2 i out < 1 50m a @ v in > 3.2v, 10 1 10 typical application circuit rr r vin en gnd vout cn c pump cp v in 2.8v to v out 3 c out + 5 c in led led led RT9361A/b 1 2 4 6 functional pin description pin number pin name pin function t/sot-23-6 wdfn-6l 2x2 1 6 vou t output voltage 2 5, exposed pa d (7) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum pow er dissipation. 3 4 en chip enable (active high) 4 3 cn flying capacitor n egative terminal 5 2 vin power input voltage 6 1 cp flying capa citor po sitive terminal + - v ref load disconnect cp cn v out v in en gnd short circuit protection 1mhz osc current bias voltage reference
RT9361A/b 3 ds9361a/b-13 april 2011 www.richtek.com electrical characteristics (v in = 3.7v, t a = 25c, unless otherwise specified) parameter symbol test conditions min typ max unit operation voltage range v in v out = 5v 2.8 -- v out v RT9361A , v in >3.2v, i out <110ma 4.8 5 5.2 v output voltage v out rt9361b , v in >3.2v ,i out <150ma 4.32 4.5 4.68 v quiescent current i q i out = 0, -- 2 4 ma RT9361A , v in >3.2v, c pump = 1 f 110 -- -- maximum output current i out rt9361b , v in >3.2v, c pump = 1 f 150 -- -- ma ocp i ocp 250 350 500 ma short circuit current -- 60 90 ma output ripple i out = 60ma, c out = 2.2 f -- 30 -- mv shut down current i shdn v in = 4.5v, v en <0.4v -- 0.1 1 a operation frequency f osc 0.8 1 1.3 mhz digital input high level v ih 1.5 -- -- v digital input low level v il -- -- 0.4 v absolute maximum ratings (note 1) z supply input voltage ------------------------------------------------------------------------------------------------------ ? 0.3v to 6v z other i/o pin v oltages --------------------------------------------------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c t/sot-23-6 ------------------------------------------------------------------------------------------------------------------ 0.4w wdfn-6l 2x2 -------------------------------------------------------------------------------------------------------------- 0.606w z package thermal resistance (note 2) t/sot-23-6, ja ------------------------------------------------------------------------------------------------------------ 250 c/w wdfn-6l 2x2, ja --------------------------------------------------------------------------------------------------------- 265 c/w z junction temperature ----------------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------------- 260 c z storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ---------------------------------------------------------------------------------------------- 2kv mm (ma chine mode) ------------------------------------------------------------------------------------------------------ 200v recommended operating conditions (note 4) z ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c z junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c
RT9361A/b 4 ds9361a/b-13 april 2011 www.richtek.com note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in the natural convection at t a = 25 c on the single layer low effective thermal conductivity test board of jedec 51-3 thermal measurement standard. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT9361A/b 5 ds9361a/b-13 april 2011 www.richtek.com typical operating characteristics output voltage vs. output current 4.4 4.5 4.6 4.7 4.8 4.9 5 5.1 10 20 30 40 50 60 70 80 output current (ma) output voltage (v) v in = 3.2v v in = 3.7v v in = 4.3v v in = 5v operation frequency vs. temperature 0.8 0.9 1 1.1 1.2 1.3 1.4 -40-30-20-100 1020304050607080 temperature operation frequency (mhz) i out = 60ma i out = 0ma ( c) output voltage vs. temperature 5.03 5.035 5.04 5.045 5.05 5.055 5.06 5.065 5.07 5.075 5.08 -40-30-20-10 0 1020304050607080 temperature output voltage (v) i out = 60ma i out = 0ma ( c) (for RT9361A, c in = c out = 2.2 f, c pump = 0.22 f, t a = 25 c, unless otherwise specified ) quiescent current vs. input voltage 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 input voltage (v) quiescent current (ma) t a = 85 c t a = 25 c t a = -40 c t a = -20 c output voltage vs. input voltage 4.8 4.84 4.88 4.92 4.96 5 5.04 5.08 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 input voltage (v) output voltage (v) t a = 85 c t a = 25 c t a = -40 c i out = 60ma output voltage vs. input voltage 4.5 4.6 4.7 4.8 4.9 5 5.1 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 input voltage (v) output voltage (v) i out = 10ma i out = 20ma i out = 30ma i out = 40ma i out = 50ma i out = 60ma i out = 70ma i out = 80ma
RT9361A/b 6 ds9361a/b-13 april 2011 www.richtek.com v il vs. input voltage 0.8 0.9 1 1.1 1.2 1.3 1.4 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 input voltage (v) v il (v) v ih vs. input voltage 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 input voltage (v) v ih (v) inrush current time (40 s/div) v in en i in (2v/div) (2v/div) (2v/div) (500ma/div) v in = 5v, i out = 60ma v out inrush current time (40 s/div) v in en i in v out (2v/div) (2v/div) (2v/div) (500ma/div) v in = 2.8v, i out = 60ma t a = 85 c t a = 25 c t a = -40 c t a = 85 c t a = 25 c t a = -40 c efficiency vs. output curent 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 10 15 20 25 30 35 40 45 50 55 60 output curent (ma) efficiency (%) v in = 3v v in = 4.2v v in = 3.4v 85 80 75 70 65 60 55 50 45 40 efficiency vs. input voltage 0.4 0.5 0.6 0.7 0.8 0.9 1 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 input voltage (v) efficiency (%) i out = 10ma i out = 20ma i out = 30ma i out = 40ma i out = 50ma i out = 60ma 100 90 80 70 60 50 40
RT9361A/b 7 ds9361a/b-13 april 2011 www.richtek.com normal operation time (400ns/div) v in v out i out cn (1v/div) (2v/div) (2v/div) (50ma/div) v in = 2.8v, i ou t = 60ma v in v out i out cn normal operation time (400ns/div) (2v/div) (2v/div) (2v/div) (50ma/div) v in = 5v, i out = 60ma dimming operation time (10ms/div) v out v in i in pwm (2v/div) (2v/div) (50ma/div) v in = 3.7v (2v/div) refer to application informatiom ? figure 1 ? dimming operation time (40 s/div) v out v in i in pwm (2v/div) (2v/div) (2v/div) (50ma/div) v in = 3.7v refer to application informatiom ? figure 1 ? maximum output current vs. input voltage 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 input voltage (v) maximum output current (ma) t a = -40 c t a = -20 c t a = 25 c t a = 85 c
RT9361A/b 8 ds9361a/b-13 april 2011 www.richtek.com application information capacitor selection careful selection of the three external capacitors c in , c out and c pump is very important because they will affect ramp- up time, output ripple and transient performance. optimum performance will be obtained when low esr (<100m ) ceramic capacitors are used for c in and c out and c pump . in general, low esr may be defined as less than 100m . in all cases, x7r or x5r dielectric are recommended. for particular application, low esr tantalum capacitors may be substituted; however optimum output ripple performance may not be realized. aluminum electrolytic capacitors are not recommended for using with the RT9361A/b due the their inherent high esr characteristic. in general, lower values for c in , c out and c pump may be utilized for light load current applications (<60ma). drawing a load current of 60ma or less may use a c in and c out capacitor value as low as 2.2 f and a c pump value of 0.22 f. c in and c out may range from 1 f for light loads to 10 f for heavy output load conditions (<110ma). c pump may range from 0.22 f for light loads to 1 f for heavy output load conditions. if c pump is increased, c out should also be increased by the same ratio to minimize output ripple. as a basic rule, the ratio between c in , c out and c pump should be approximately 10 to 1. lowering the c in , c out and c pump value can decrease the ramp-up time of v out , but it will increase the output ripple oppositely. figure 1. application circuits for backlight dimming figure 2. application circuits for flash leds figure 3. application circuits for constant load figure 4. application circuits for doubling the output current rr r vin en gnd vout cn c pump cp v in c out + c in led led led RT9361A/b 2.2f 0.22f 2.2f v out 4.5v/150ma vin en gnd vout cn c pump cp v in c out + c in RT9361A/b 10f 1f 10f 1f l 1h v out 5v/110ma vin en gnd vout cn c pump cp v in 3.3v c out + c in RT9361A/b 10f 0.22f 10f v out 5v/180ma vin en gnd vout cn c pump cp RT9361A/b 0.22f rr r vin en gnd vout cn c pump cp v in c out + c in led led led RT9361A/b 100 100 100 20ma 20ma 20ma 2.2f 0.22f 2.2f
RT9361A/b 9 ds9361a/b-13 april 2011 www.richtek.com pcb board layout the RT9361A/b is a high-frequency switched-capacitor converter, and therefore large transient currents will flow in v in and v out . for best performance and to minimize ripple, place all of the components as close to ic as possible. besides a solid ground plane is recommended on the bottom layer of the pcb. the ground of c in and c out should be connected together and as close to the ic as possible. figure 6 and figure 7 shows the typical pcb layout of RT9361A/b evb board. thermal considerations the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) - t a ) / ja where t j(max) is the maximum operation junction temperature 125 c, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of rt9361, where t j(max) is the maximum junction temperature of the die (125 c) and t a is the operated ambient temperature. the junction to ambient thermal resistance ja for t/sot-23-6 is 250 c/w and wdfn-6l 2x2 is 165 c/w on the standard jedec 51-3 single layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c ? 25 c) / 250 c/w = 0.4w for t/sot-23-6 packages p d(max) = (125 c ? 25 c) / 165 c/w = 0.606w for wdfn-6l 2x2 packages the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . for rt9361 packages, the figure 5 of de- rating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. mode) operating pump charge 2 ( 100 2v v 100 2i v i v 100 p p (%) efficiency in out out in out t ou in out ? ? ? = = = efficiency the efficiency of the charge pump regulator varies with the output voltage version, the applied input voltage, the load current, and the internal operation mode of the device. the approximate efficiency is given by : for a charge pump with an output of 5 volts and a nominal input of 3 volts, the theoretical efficiency is 83.33%. due to internal switching losses and ic quiescent current consumption, the actual efficiency can be measured as 82.72%. figure 6 figure 7 figure 5. derating curves for rt9361 packages 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 25 50 75 100 125 ambient temperature (c) power dissipation (w) single layer pcb wdfn-6l 2x2 t/sot-23-6
RT9361A/b 10 ds9361a/b-13 april 2011 www.richtek.com a a1 e b b d c h l sot-23-6 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.889 1.295 0.031 0.051 a1 0.000 0.152 0.000 0.006 b 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 c 2.591 2.997 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024 outline dimension
RT9361A/b 11 ds9361a/b-13 april 2011 www.richtek.com tsot-23-6 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.700 1.000 0.028 0.039 a1 0.000 0.100 0.000 0.004 b 1.397 1.803 0.055 0.071 b 0.300 0.559 0.012 0.022 c 2.591 3.000 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024 a a1 e b b d c h l
RT9361A/b 12 ds9361a/b-13 april 2011 www.richtek.com information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property inf ringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications i s assumed by richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.200 0.350 0.008 0.014 d 1.950 2.050 0.077 0.081 d2 1.000 1.450 0.039 0.057 e 1.950 2.050 0.077 0.081 e2 0.500 0.850 0.020 0.033 e 0.650 0.026 l 0.300 0.400 0.012 0.016 w-type 6l dfn 2x2 package d 1 e a3 a a1 e b l d2 e2 see detail a 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options

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